BRAM_INIT用VHDL(BRAM_INIT in VHDL)

 我正在模拟基于处理器的设计，其中程序存储器内容保存在BRAM中。 我正在使用VHDL实现程序内存（推断BRAM）。 我试图避免CoreGen，因为我想保持设计的便携性。 最终，这种设计将转至FPGA。 
 
 我想看看是否有办法使用VHDL泛型初始化BRAM的内存内容？ 我知道Coregen使用COE文件来初始化BRAM，但是我们是否有基于VHDL代码的方式来执行此操作？ 
 
 让我知道您的替代建议。 

I am simulating a processor based design where the program memory contents are held in a BRAM. I am realizing the program memory using VHDL (inferring BRAMs). I am trying to avoid CoreGen because I want to keep the design portable. Eventually this design will go to an FPGA.
 
I am looking to see if there is a way to initialize memory contents of the BRAMs using VHDL generics ? I understand that Coregen uses COE file to initialize the BRAM but do we have a VHDL code based way to do this ?
 
Let me know your alternate suggestions as well.

原文：https://stackoverflow.com/questions/10555729